This invention relates to digital signal generators; and more particularly, it relates to generators for producing masking control signals.
In a digital computer, digital data is formatted in words of predetermined lengths such as 16 bits, 32 bits, and 64 bits. Bit 0 is the least significant bit; bit 1 is the next least significant bit; bit 2 is the next least significant bit; etc. These data words are stored in various storage means such as a memory or a register from which they are selectively retrieved and operated on by an arithmetic unit in response to instructions of a program.
Often, however, the instructions specify that only a portion of a data word is to be operated on. For example, an instruction may specify to compare only bits 4 thru 12 of one 16-bit data word with bits 4 thru 12 of another 16-bit data word. In such a case, a means is needed to generate signals which mask those bits of the data word that are to be ignored in the arithmetic operation. In the above example, signals are needed to mask bits 0 thru 3 and 13 thru 15 from the selected data words prior to performing the compare operation.
One way to generate such masking signals is to use a read only memory. Two concatenated addresses (e.g., a code CD#1 and a code CD#2) are sent to the address input terminals of the read only memory. Code CD#1 specifies the most significant bit of the word that is not to be masked while CD#2 specifies the least significant bit of the word that is not to be masked. Each concatenation of code CD#1 and code CD#2 addresses a word in the read only memory, and bits in the addressed word are pre-set to the desired masking pattern.
A problem, however, with the above described read only memory signal generator is that it requires too many transistors for its implementation. For example, if the word that is to be masked contains 64 bits, then code CD#1 and code CD#2 both must contain six bits in order to be able to specify all of the 64-bit locations. Also, each word in the read only memory must contain 64 bits. Thus, the total number of transistors in the ROM (which equals the total number of bits in the ROM) is 64.times.64.times.64 which equals 262,144 transistors. Also, the number of transistors grows rapidly as the number of bits in the word that is to be masked increases.
Accordingly, a primary object of the invention is to provide an improved signal generator for producing mask signals which selectively mask bits of a data word.
Another object of the invention is to provide a mask signal generator which requires a substantially reduced number of transistors for its implementation.